On Thu, 2021-12-02 at 17:12 +0000, Ian Molton wrote: > indeed, I'm finding it hard to understand the placement of anything > in a makefile - they seem to be processed from top to bottom, but > "not always", and its not obvious how.
Have you looked at the GNU make manual? https://www.gnu.org/software/make/manual/html_node/index.html Even reading just the first few chapters should give you a good starting point. Makefiles are _parsed_ from top to bottom, just like a C or C++ compiler will parse a C or C++ source file. However, targets are not updated as the makefiles are parsed (unlike, say, a shell script which is run as it's parsed). Instead, make constructs an internal graph of the targets and their prerequisites. Once the entire makefile (and all included files etc.) has been parsed and the internal graph is complete, then make will choose a spot in the graph to start running: that spot is usually the first explicit target it sees in a makefile but can be modified in various ways including by putting a different target on the command line. Then make tries to build every target, by first checking its prerequisites, then their prerequisites, etc. > I'd also like to know if there's a reliable way to disable all the > "build in" rules and variables, so that I have no risk of "tripping > over" them - I've found -r and -R, but I've also found dire warnings > in (eg. Linux) that this isn't reliable in all versions of make. Putting -r and -R on the make command line is guaranteed to work in every version of GNU make. In more modern versions (starting with GNU make 4.0, released in 2013) you can also add these INSIDE your makefile by using: MAKEFLAGS += -rR or similar. Alternatively you can unset them directly rather than using the option shortcut, as Kaz mentions. This will get rid of at least all the ones you are likely to ever run into.
