In <[EMAIL PROTECTED]>, on 07/28/2005
at  09:59 AM, Bill Fairchild <[EMAIL PROTECTED]> said:

>When PAV is  involved, other considerations complicate matters.  Any  
>number  of I/Os can theoretically be happening simultaneously  within
>the same  data set  from any number of exposures as long  as all those
>I/Os are read  only.  But  if only one of  them wants to do a write,
>then serialization is  necessary   within the control unit.



In a message dated 8/1/2005 5:24:31 P.M. Central Daylight Time,  
[EMAIL PROTECTED] writes:

 
>How did IBM handle that on the 2305 and the paging 3880  boxen?


 
 
I don't know.  That is an interesting question.  Certainly the  same need to 
serialize in order to protect data in the case of one writer and  seven 
readers exists.  Perhaps this situation didn't apply on the 3880-2305  because 
the 
only software component that ever used the multiple exposures on a  2305 was 
ASM (I think), and ASM could be trusted to know what it was doing with  its 
data.  The 2305 is a general-purpose PAV box, so all user I/O can go  through 
multiple exposures (now called PAV) on it as well as ASM.  The  protective 
serialization in the 2305 is provided by the controller microcode,  and applies 
to 
all I/O, including ASM, so the ASM developers are forced to make  adjustments 
to 
ASM in order to accommodate what the microcode will do with ASM's  highly 
specialized and optimized chains; i.e., unless ASM does something unusual  the 
microcode will thwart their optimization schemes.  But on the 2305  there was 
no 
need for serialization at the control unit level, since the only  user was 
ASM and it correctly serialized through its page-handling logic.
 
Just my guess.
 
I would also guess that the 3880 caching controller models 11 and 21, which  
were intended for paging I/O only, had the same situation [1], and I think  
multiple exposures were available for those devices as well.
 
Bill Fairchild
 
[1] I.e., a potential problem that would occur if general I/O were allowed  
onto the device, but no problem if only ASM I/O were allowed onto it, so thus  
there was no controller microcode needed to handle the  problem.

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