So  SAC 512
    LAE R3,0(,R4)

 R3 is CPYA from access R4  right 

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of McKown, John
Sent: Tuesday, March 06, 2012 4:22 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Yes, from the LAE instruction text:

<quote>
The address specified by the X2, B2, and D2 fields is
placed in general register R1. Access register R1 is
loaded with a value that depends on the current
value of the address-space-control bits, bits 16 and
17 of the PSW. If the address-space-control bits are
01 binary, the value placed in the access register
also depends on whether the B2 field is zero or non-
zero.

...

PSW Bits
16 and 17
Value Placed in Access Register R1
00 00000000 hex (zeros in bit positions 0-31)

10 00000001 hex (zeros in bit positions 0-30
and one in bit position 31)

01 If B2 field is zero: 00000000 hex (zeros in
bit positions 0-31)
If B2 field is nonzero: Contents of access
register B2

11 00000002 hex (zeros in bit positions 0-29
and 31, and one in bit position 30)

>From the SAC instruction 

Code    Name of Mode            Result in PSW Bits 16 & 17
0000    Primary space           00
0001    Secondary space 10
0010    Access register 01
0011    Home space                      11
All others Invalid

</quote>

SAC 512 has is '0010' from the above and results in b'01' or AR mode in the
PSW bits 16 & 17. Which is what is required for the LAE instruction to set
the access register of the result access register from the base access
register (when not b'0000').



John McKown 

Systems Engineer IV

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> -----Original Message-----
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 3:00 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> John Mckiwns reply was a explanation of the SAC inst.    
> Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent 
> on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before 
> executing the LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott 
> <rsc...@rocketsoftware.com> wrote:
> 
> > John McKown's reply covered these points very well
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -----Original Message-----
> > From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: 06 March 2012 19:59
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > Thanks
> > 
> > Regarding my questions
> > 
> > The doc says the inst is dependent
> > On address space control bits which is set by the SAC inst. 
> > 
> > Secondly seems like the displacement doesn't play a role in the inst
> > 
> > Sent from my iPhone
> > 
> > On Mar 6, 2012, at 2:49 PM, Rob Scott 
> <rsc...@rocketsoftware.com> wrote:
> > 
> >>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Should read :
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,0(R4,R0)"
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftware.com
> >> 
> >> 
> >> -----Original Message-----
> >> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On 
> >> Behalf Of Rob Scott
> >> Sent: 06 March 2012 19:47
> >> To: IBM-MAIN@bama.ua.edu
> >> Subject: Re: LAE instruction
> >> 
> >> Commas are *very* important in AR-mode
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Coded that way there is no automatic way that AR3 is going 
> to inherit the AR4 value.
> >> 
> >> You need : "LAE   R3,0(,R4)"
> >> 
> >> This will ensure that AR3 is populated from the AR for the 
> referenced base register R4.
> >> 
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftware.com
> >> 
> >> 
> >> -----Original Message-----
> >> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On 
> >> Behalf Of Micheal Butz
> >> Sent: 06 March 2012 19:05
> >> To: IBM-MAIN@bama.ua.edu
> >> Subject: LAE instruction
> >> 
> >> Hi,
> >> 
> >> 
> >> 
> >> I have two part question regarding the LAE instruction
> >> 
> >> 
> >> 
> >> .         What would the sac value e.g. 256,512,768 have 
> to be that when
> >> using the LAE instructions with the following operands LAE 
>  3,0(R4) 
> >> would
> >> AR3 get loaded with AR4
> >> 
> >> 
> >> 
> >> .         Second what value does the displacement play in 
> the instruction
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >> 
> >>                Thanks     
> >> 
> >> 
> >> 
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> > 
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