There is another very common way for a massive number of S0C4s to be generated 
and instantly resolved, which I have often seen in System traces, and that is 
when one GETMAINs a large area of new storage and then zeroes it all out with a 
MVCL instruction.  A S0C4 interrupt occurs when the MVCL instruction, which 
runs interruptibly, touches the first byte of each successively higher virtual 
page in the large area.  Then z/OS finds an available page frame, uses it to 
back the virtual page just referenced, updates the page table appropriately, 
and redispatches the same MVCL, which is then able to zero out the same 4K that 
produced a S0C4, updates its register with the next address to move to, which 
finally becomes the first byte of the next higher 4K virtual page, then another 
S0C4 occurs, etc. etc. until the whole GETMAINed area contains X'00'.

Bill Fairchild
Programmer
Rocket Software
408 Chamberlain Park Lane * Franklin, TN 37069-2526 * USA
t: +1.617.614.4503 *  e: bfairch...@rocketsoftware.com * w: 
www.rocketsoftware.com


-----Original Message-----
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Tom Marchant
Sent: Tuesday, April 24, 2012 9:40 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Explination of S0C4 reason code 4 and related data areas

On Tue, 24 Apr 2012 17:21:24 +0300, Binyamin Dissen 
<bdis...@dissensoftware.com> wrote:

>On Tue, 24 Apr 2012 09:15:05 -0500 Tom Marchant 
><m42tom-ibmm...@yahoo.com>
>wrote:
>
>:>It is more common for these exceptions to be resolved and the 
>:>instruction retried than it is for the access to result in a S0C4 abend.
>
>As I specified "page in", it is clear that the hardware received an exception.

I'm not sure what you mean by that.  _All_  S0C4 abends are the result of the 
processor recognizing an exception.

>But I would suggest that most references to "invalid" pages do not 
>cause an 0C4.

Yes.  That's what I wrote.

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