shmuel+ibm-m...@patriot.net (Shmuel Metz , Seymour J.) writes: > This is a case where I prefer the Burroughs notation; they called the > equivalent flag the presence bit, which is more neutral.
page transfers/io is done with channel programs which have real addresses. virtual memory has segment and page tables that map specific virtual memory pages to real pages. when a virtual page is selected for replacement, the corresponding page table entry invalid bit is set, the contents of the real page is written out, the replacing virtual page is read into the real page location, and then the corresponding page table entry invalid bit (for the replacing virtual page) is trned off. this is copy of presentation on cp/40 given at 1982 SEAS meeting http://www.garlic.com/~lynn/cp40seas1982.txt where they modified standard 360/40 to support virtual memory. In the 360/40, there were 64 4kbyte real pages. The added hardware gave each 4k real page had an virtual address space identifier (somewhat analogous to storage keys) plus a virtual page number. Running a virtual machine involved loading a virtual address space identifier into control register. In virtual address mode ... all real pages would be interrogated for matching virtual address space identifier plus matching virtual page number. cp/40 morphed into cp/67 when standard 360/67 with virtual memory hardware becamse available ... which looked much more like 370 virtual memory segment and page tables ... that continue through the various generations. I've claimed that the 801/risc effort was at least partially in reaction to the enormous complexity of the (failed) future system effort (which was going to completely replace 360/370 ... but imploded before even being announced) ... some past posts http://www.garlic.com/~lynn/submain.html#futuresys ... where 801/risc was going to the opposite extreme (to FS) by eliminating a lot of hardware complexity and simplifying the hardware. One of the things in 801/risc were "inverted pagetables" ... which are effectively much more like the 360/40 virtual memory implementation. 801/risc romp chip instead of having a virtual address space identifier had a 12bit virtual segment identifier (aka "STE" associative ... rather than the 360/370 "STO" associative). romp had 32bit virtual addressing with 16 256mbyte segments. When going to run something ... the segment identifiers were loaded into the 16 segment registers. Running in virtual address space made would peal off the virtual address space number and index the corresponding segment register, pull out the segment identifier ... and then use the virtual segment identifier plust segment virtual page number to look for the associated real page number. In 801/ROMP, rather than turning off the invalid bit ... to indicate virtual page is available ... the corresponding segment-id plus segment-virtual-page-number is loaded (for corresponding real page). misc. past posts mentioning 801, risc, romp, rios, power, power/pc, etc http://www.garlic.com/~lynn/subtopic.html#801 -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
