These were the most interesting links I found so far and sent to my team in addition to the announce itself
Announce http://www-01.ibm.com/common/ssi/cgi-bin/ssialias?subtype=ca&infotype=an&appname=iSource&supplier=877&letternum=ENUSZG12-0262 Draft - IBM zEnterprise EC12 Technical Introduction http://www.redbooks.ibm.com/redbooks.nsf/RedpieceAbstracts/sg248050.html?Open Draft - IBM zEnterprise EC12 Technical Guide http://www.redbooks.ibm.com/redpieces/abstracts/sg248049.html?Open Non-IBM blog Mainframe Watch Belgium http://mainframe-watch-belgium.blogspot.com/2012/08/the-new-ibm-zenterprise-ec12-technical.html YouTube Video - IBM zEnterprise EC12 Walkthrough Video Featuring Nick Sardino http://www.youtube.com/watch?v=-N3QWegGFYY&feature=em-subs_digest The biggest surprise for me was zAware the new monitoring appliance running in an LPAR. This appears to be chargeable and currently just monitoring messages but moving infrastructure overhead and function out of the z/OS space into an LPAR is the MIPS Vacuum for this type of workload I have hoped to see for a while now. There is a heavily promoted webcast starting in less than an hour that should cover all this. Best Regards, Sam Knutson, GEICO System z Team Leader mailto:[email protected] (office) 301.986.3574 (cell) 301.996.1318 "Think big, act bold, start simple, grow fast..." -----Original Message----- From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf Of Meral Temel (Garanti Teknoloji) Sent: Tuesday, August 28, 2012 9:56 AM To: [email protected] Subject: Re: The IBM zEnterprise EC12 announcment With the new machine,it seems like there is A LOT to read which is greate! .. You may find it usefull to check this part of Draft EC12 tech guide redbook.I think it is nice,because it summaries performance items well .... Regards Meral 1.9.7 Main performance improvement drivers with zEC12 The zEC12 is designed to deliver new levels of performance and capacity for large scale consolidation and growth. The following attributes and design points of the zEC12 contribute to overall performance and throughput improvements as compared to the z196. /Architecture implementation enhancements: Transactional Execution (TX) designed for z/OS, Java, DB2 and other exploiters Runtime Instrumentation (RI) provides dynamic and self-tuning online re-compilation capability for Java workloads Enhanced DAT-2 for supporting 2 GB large pages for DB2 buffer pools, Java heap size and other large structures Software directives implementation to improve hardware performance Decimal format conversions for COBOL programs. zEC12 microprocessor design enhancements: Six processor cores per chip Enhanced Out Of Order (OOO) execution design Improved pipeline balance Enhanced branch prediction latency and instruction fetch throughput Improvements on execution bandwidth and throughput New design for Level 2 private cache with separation of cache structures for instructions and L2 operands Reduced access latency for most of Level 1 cache misses Bigger Level 2 cache with shorter latency Third level on-chip shared cache is doubled Fourth level book-shared cache is doubled Hardware and software prefetcher handling improvements Increased execution/completion throughput Improve fetch and store conflict scheme Enhance branch prediction structure and sequential instruction fetching Millicode performance improvements Optimized floating-point performance Faster engine for fixed-point division New second level branch prediction array One cryptographic/compression co-processor per core Cryptography support of UTF8<>UTF16 conversions Higher clock frequency at 5.5 GHz IBM CMOS 13S 32nm SOI technology with IBM eDRAM technology. zEC12 design enhancements: Increased total number of PUs available on the system, from 96 to 120, and number of characterizable cores, from 80 to 101 Hardware System Area increased from 16 GB to 32 GB Increased default number of SAP processors per book New CFCC code available for improved performance – Elapsed time improvements when dynamically altering the size of a cache structure – DB2 conditional write to a group buffer pool (GBP) – Performance improvements for coupling facility cache structures to avoid flooding the coupling facility cache with changed data and avoid excessive delays and backlogs for cast-out processing – Performance throughput enhancements for parallel cache castout processing by extending the number of RCC cursors beyond 512 – CF Storage class and castout class contention avoidance by breaking up individual storage class and castout class queues to reduce storage class and castout class latch contention. New features available on the zEC12: Crypto Express4S performance enhancements Flash Express PCIe cards to handle paging workload spikes and improve performance ==================== This email/fax message is for the sole use of the intended recipient(s) and may contain confidential and privileged information. Any unauthorized review, use, disclosure or distribution of this email/fax is prohibited. If you are not the intended recipient, please destroy all paper and electronic copies of the original message. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
