Hi Peter,
This works:
ST R14,0(,R13)
JAS R14,*+4+8
DC C'$SL$',Y(x,y)
L R14,0(,R13)
and I can do DA=(14R?,EQ,5BE2D35Bxxxxyyyy)
Where x is a module's identification number and y is the nth macro
expansion for my SLIP trigger macro.
What I wanted to do was:
J *+4+8
DC C'$SL$',Y(x,y)
and I can do something like DA=(PSW?,EQ,5BE2D35Bxxxxyyyy)
I was hoping to use the PSW in order to preserve all of my registers.
Apparently, I am not going to be able to do what I want to do.
Thanks for the information.
Chuck
On Wed, Jun 21, 2023 at 7:24 AM Peter Relson <[email protected]> wrote:
> As you have observed, there is no support for "PSW".
>
> I'm curious what SLIP trap you're setting that would let you even know to
> look at "+4". You'd have to know that the instruction itself was a branch
> and that it was one of "your" branches. If you really could tell that it
> was one of your branches, and if you have a reg that you can afford to use
> consistently perhaps use BRAS instead of J and then you could indirect off
> of the value in the reg.
>
> If this is a PER-SB (or IF) trap, and you know the address is below 2G,
> field LCCAPERA contains the address of the instruction that took the PER
> interrupt. LCCAPPSW contains the resulting PSW (so LCCAPPSW+4 contains the
> address, but may have bit 0 on)
>
> The LCCA is pointed to by PSA location x'210'.
>
> LCCXLCCAPERA and LCCXPPSW16_2 contain the 8-byte address and 16-byte PSW
> analogs.
>
> With use of an expression using indirection starting at x'210' and the EQ
> or EQA comparand you might be able to do something.
>
> Peter Relson
> z/OS Core Technology Design
>
>
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