Simple experimentation will show what you need to know about what is saved where. For example, suppose your mainline links to another routine.You mainline's RB and the LINK target's RB can be examined. Or suppose your mainline has an ESTAE and abends.You can examine the mainline's RB, then the (next newer) RTM SVRB, then the (next newer) ESTAE routine's PRB. If you were trying to think about why it does what you will figure out that it does, you'd realize that the regs that the SVC interrupt handler processing wants to use have to be saved really quickly but the PSW is already captured (in SVC Old PSW).
Peter Relsonz/OS Core Technology Design ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
