I have a suggestion.

Try writing an IPCS CLIST that does the formatting you want. Try it on
multiple dumps. When you get the CLIST worked out, then perhaps consider
putting it in a recovery routine.

On Sun, 4 Feb 2024 12:53:16 -0500 Joseph Reichman <[email protected]>
wrote:

:>And they are in the manual you previously 
:>
:>Posted ?
:>
:>
:>Just for clarity sake 
:>
:>Just ran  a small test 
:>
:>For the interrupt PSW which in the case of some PRB s might have a cde 
:>
:>The registers that go along with that RBOPSW 
:>Are always in the next rb 
:>
:>Regardless of the cause of the interrupt 
:>
:>Hope this is right 
:>
:>Thank you very much all 
:>
:>> On Feb 4, 2024, at 11:49?AM, Seymour J Metz <[email protected]> wrote:
:>> 
:>> ?Yes, expressed in hexadecimal. Systems Codes has a complete list of 
program interrupt codes that can cause an S0C4 if not intercepted.
:>> 
:>> --
:>> Shmuel (Seymour J.) Metz
:>> http://mason.gmu.edu/~smetz3
:>> ??? ?????????? ???
:>> ?????? ??????????? ???? ??????????
:>> 
:>> ________________________________________
:>> From: IBM Mainframe Discussion List <[email protected]> on behalf of 
Joseph Reichman <[email protected]>
:>> Sent: Sunday, February 4, 2024 11:45 AM
:>> To: [email protected]
:>> Subject: Re: Registers in the RB
:>> 
:>> 
:>> Seymour
:>> 
:>> When you say for example IC10 you are referring what would be in RBINTCOD 
correct ?
:>> 
:>>> On Feb 4, 2024, at 11:33?AM, Seymour J Metz <[email protected]> wrote:
:>>> ?Since OS/VS, interrupt code 04 is less common amd an S0C4 is more likely 
to be due to e.g., IC10, IC11. In MVT it's always IC04.
:>>> 
:>>> --
:>>> Shmuel (Seymour J.) Metz
:>>> http://mason.gmu.edu/~smetz3
:>>> ??? ?????????? ???
:>>> ?????? ??????????? ???? ??????????
:>>> 
:>>> ________________________________________
:>>> From: IBM Mainframe Discussion List <[email protected]> on behalf 
of Joseph Reichman <[email protected]>
:>>> Sent: Sunday, February 4, 2024 11:11 AM
:>>> To: [email protected]
:>>> Subject: Re: Registers in the RB
:>>> 
:>>> I’m trying to understand so that u don’t mess things up
:>>> 
:>>> The way Seymour explained it
:>>> 
:>>> For purposes of example the hardware gives control to the program check
:>>> FLIH for interrupt code 4 the program check FLIH issues ABEND abend code
:>>> 0C4 reason 4
:>>> 
:>>> Joe Reichman
:>>> 
:>>> 
:>>>> On Sun, Feb 4, 2024 at 11:06?AM Binyamin Dissen 
<[email protected]>
:>>>> wrote:
:>>>> 
:>>>> On Sun, 4 Feb 2024 10:29:59 -0500 Joseph Reichman <[email protected]>
:>>>> wrote:
:>>>> 
:>>>> :>But thought S0C4 is a program check
:>>>> 
:>>>> It is.
:>>>> 
:>>>> It may be a pic-4,-10, or -11. If PIC-4, PSW was updated.
:>>>> 
:>>>> An error recovery routine that messes up things is worse than none.
:>>>> 
:>>>> --
:>>>> Binyamin Dissen <[email protected]>
:>>>> 
http://secure-web.cisco.com/1816mdJ8h5-_oO1Xw58w3a8lEY_-kExorCz4aYg_qWRPUg_S6L1Z7PSPpA_kZcoVdyWJRO7o8CZk3cdmof4xYFKWUq5F_354st8NqQ1H-DfhXLX7hOZMR91CjoL1YT6Mbzl6njAZmKFdodaka0a1fK4YYTFZC0MgMlnj3ZJIgBM_AqiHoqGC_AbIMpQH0IAacZQAZlVgvJf80mITj1INV2l7F5k_pFjt0QOTQKtvKl1ATyTUInntV2lYhaRLgGmYZAWVJIDYXYDUZJUKOWAxwAMDRvCZ_zlmMheKUwEgmhUqjkH-LZSn6EJ0dT3AX1KtXJ7SEVz6_Ju0n0gr_1s7lMc-k6E1u0vGItaEOADznerc8n-GIWT-wkJUZtCSSs1yckiVlCN-FkVRjnrgwLsd35OJUqktorRcnmAbG4EHP89E/http%3A%2F%2Fwww.dissensoftware.com
:>>>> 
:>>>> Director, Dissen Software, Bar & Grill - Israel
:>>>> 
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--
Binyamin Dissen <[email protected]>
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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