On Mon, 17 Mar 2025 at 14:32, Richard Zierdt <
[email protected]> wrote:

> The following is documented in PoPs, but what the hey.
>
> Primary (ASC) Mode: MVCL R0,Rx  is fine
>
> AR (ASC) Mode: MVCL R0,Rx  is *not* fine — AR0 is not honored
>
> The PoPs manual on MVCL:
>
> "In the access-register mode, the contents of access
> register R1 and access register R2 are compared. If
> the R1 or R2 field is zero, 32 zeros are used rather
> than the contents of access register 0. "
>

This is not particular to MVCL - it applies generally to AR0, and is
explained in Chapter 5 under Access-Register Functions:

Access register 0 is treated in a special way by
access-register translation; it is treated as containing
00000000 hex, and its actual contents are not exam-
ined. Thus, a logical address specified by means of a
zero B or R field in the access-register mode is
always relative to the primary address space, regard-
less of the contents of access register 0. However,
there is one exception to how access register 0 is
treated: the TEST ACCESS instruction uses the
actual contents of access register 0, instead of treat-
ing access register 0 as containing 00000000 hex.

IBM has chosen to document this individually for a few older instructions
that use an "R" field to address storage (rather than "B" + "D" fields).
I'd guess this is exactly because MVCL et al *do* allow use of R0 to
address data - and so programmers might assume, as it appears you've done,
that AR0 would also be honoured, whereas B+D instructions have treated R0
as containing 0 for addressing purposes from the earliest days of S/360.
Notably this behaviour of AR0 is not documented individually for most newer
(S/390+) instructions that use "R" fields.

There is probably a reason why AR0 is not supported as MVCL operands; it's
> just that it's inconsistent with the corresponding behavior in Primary ACS
> mode.
>

I wouldn't put it that way; AR0 is ignored in Primary mode. You could argue
that it's inconsistent with the way R0 is used in MVCL vs B+D instructions,
but it does allow any instruction to avoid having to set (and perhaps
save/restore) an AR just to address the Primary space while in AR mode.

Tony H.

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