Hi, I am starting to learn about Linux on System z and was going through redbooks and other material available on IBM website as well as on google to get details on how is a mainframe core characterised as IFL.
For IFL, I came across "This is a normal processor with one or two instructions disabled that are used only by z/OS". Please can someone help me understand : 1) Is the disabling of instructions done via micro or millicode? 2) How does diabling few instructions restrict z/OS from running on IFL? 3) Each mainframe book has MCM (multi chip module) which has 6 chips (latest version) and each chip has 6 cores - when characterising each core as IFL is it possible to have only 4 cores in a chip as IFL OR is it possible to have 2 cores from 1 chip and 2 cores from 2nd chip as IFL? 4) Once the system definition is complete and is executing production workloads, how is an IFL added to the system using the same book? Thanks Adarsh Khanna ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
