On Mon, 17 Feb 2014 08:02:40 -0800, Charles Mills wrote:
>
>I got to thinking it would be nice to have a "store different" instruction (or 
>make store behave this way automatically under the covers) which would 
>invalidate the cache only if what it were storing were different from what was 
>in memory already.
>
>-----Original Message-----
>From: IBM Mainframe Discussion List [mailto:[email protected]] On 
>Behalf Of John McKown
>Sent: Monday, February 17, 2014 6:37 AM
>
>Combining the thoughts engendered from about three replies, I wonder if
>avoiding a branch as follows (on a processor which supports the
>instructions) would perform better than branching.
>
>LT  R0,CURRENT #LOAD CURRENT AND SET CC
>SPM R1 #SAVE CC FROM LT
>A R0,SUM #ADD SUM TO IT
>IPM R1 #RESTORE CC FROM LT
>STOC R0,SUM,NZ #STORE SUM ONLY IF CC OF LT WAS NZ
> 
Doesn't one also want to avoid fetching the line into cache if it's not
already there?

I once examined the circuit diagram of some 3rd-party add-on DRAM
for a PDP-12 we had.  The hardware compared the data to be stored
with that already in memory and bypassed the write-back if identical.

-- gil

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