[email protected] (Tom Marchant) writes:
> Today's processors have cache because main memory is _really_ slow
> compared to the processor. When the processor accesses something at a
> memory address, if the data at that location is in the cache, the
> processor can access it in one clock cycle (if it is in the on-chip
> cache) or a few clock cycles if it is farther away.

i.e. current latency to access memory (on cache miss) when measured in
number of processor (clock) cycles ... is compareable to 60s disk access
latency when measured in terms of number of (60s) processor (clock)
cycles (cache is the new memory, main memory is the new disk).

that enormous idle time was what drove multiprogramming/multithreading
(in the 60s).

this old account that increasing the level of multiprogramming is what
drove decision to move to virtual memory for all 370s ... that and the
extremely inefficient MVT memory management ... aka MVT regions
typically needed to be four times larger than actively used memory
.... typical 1mbyte 360/165 MVT ran four initiators, adding virtual
memory could it increase it to 16 initiators with little paging impact.
http://www.garlic.com/~lynn/2011d.html#73 Multiple Virtual Memory

introduction of out-of-order instruction execution for z196 is claimed
to account for at least half the (per processor) performance increase
from z10 to z196. this is basically a technique when one instruction is
stalled waiting for memory, switch to another instruction in the same
instruction stream (sort of multithreading of instruction execution at
the micro level). This can only go only so far, in part because it can
get quickly complex with subsequent instructions stalled waiting for
results from previous instructions.

recent ref (hyperthreading in the early 70s)
http://www.garlic.com/~lynn/2015.html#27 Webcasts - New Technology for System z

-- 
virtualization experience starting Jan1968, online at home since Mar1970

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to [email protected] with the message: INFO IBM-MAIN

Reply via email to