Pursuant to a recent thread here I am converting a cross-memory POST to use IEAMSXMP instead. However ... I still need to support older systems without IEAMSXMP support, so I will be dual-pathing the existing POST. I got to looking at code that I have not examined in several years, and I am trying to determine exactly what is or should be going on. It runs without apparent errors, so this is kind of a theoretical question, not "please help me with this error." Here's the POST
POST (R3),LINKAGE=BRANCH,ASCB=(R2),ERRET=POSTERR,MEMREL=NO The questions are these - Given that code, will POSTERR indeed get control on an error? - The POST documentation documents two error codes, 4 and 8. Will they get passed to POSTERR? Where? Yes, I have RTFM but the FM is showing the effects of years of somewhat piecemeal revisions. Thanks, Charles ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
