Thanks a lot Greg. I am sure to have fun with that!

Regards – Grant



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-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of Greg Price
Sent: 15 November 2018 15:18
To: [email protected]
Subject: Re: ASMA034E

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On 2018-11-16 1:47 AM, Ward Able, Grant wrote:
> Can someone point me to a reasonably simple example?

If you can do branch instructions then you can do branch-relative instructions. 
Apart from RR instructions (BR, BASR, BALR, BASSM, BSM, BAKR and any others 
I've missed) replace the B that starts the branch instruction mnemonic with BR, 
or as I prefer to do, with J (for jump).

eg. BNH -> JNH and BCT -> JCT and BAS -> JAS etc.

Put all the stuff which needs to be cover by a base register after all the 
instructions, and start the area with a label, and "use" that.

eg.
LARL R11,Static
USING Static,R11
...

Static DC 0D  My module's constants and literals and non-RENT variables


Then all you need to cover is code generated by macros, which is why Peter 
mentioned ARCHLVL (look up the SYSSTATE macro) to cover macros with logic to 
test it, and the IEABRCX macro to cover the rest.

IEABRCX DEFINE
will define and activate the facility where the older "branch"
instructions will be converted to newer "branch relative" instructions when 
encountered by the assembler in the source code.  With IEABRCX you could even 
leave the old branch source code as-is, but personally I prefer to use the 
newer mnemonics to make it obvious that the code is probably not covered by a 
base register, and to keep the listing a bit tidier.

IEABRCX is "better" than IEABRC because you can turn it on and off as needed. 
The most well known scenario where you might was to turn it off (I'd say) is if 
you have a branch table where you use the index register of the 
branch-on-condition instruction to provide an index into a table of branch (or 
even jump) instructions.

That's probably enough to get you started.  Have fun with it.

Cheers,
Greg P.

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