The whole point of assembler is making it easier for the programmer to code, as 
with any other language. Yes, use of macro instructions removes some of the  
tight control of the generated machine code, but that is a good thing. I've 
programmed in assemblers with no macro facility, and they just make for more 
work. As an example, I've written code that expands to, e.g., a L/LA for a 
S/360 and an XR/ICM for a S/370; much easier than maintaining two different 
versions and much more efficient than avoiding the new instructions.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@listserv.ua.edu> on behalf of 
Charles Mills <charl...@mcn.org>
Sent: Thursday, November 15, 2018 11:33 AM
To: IBM-MAIN@listserv.ua.edu
Subject: Re: ASMA034E

@Greg is right -- Jump is not a big learning curve with lots of gotchas (unlike 
say 64-bit or AR mode).

In addition to replacing Bxx with Jxx, you need to replace BAL with BRAS. 
Again, works exactly the same, one-for-one, but no base register needed.

LARL is also very cool. It is like LA without a base register. If you code LA 
R1,FOO you first need a base register pointing to FOO (assuming FOO is not a 
numeric constant). If you code LARL R1,FOO you do not.

I am personally not fond of IEABRCX. The whole point of assembler is tight 
control of the generated machine code; not compiler magic. It is not hard at 
all to do CHG B J PREFIX and work through them one at a time either accepting 
each proposed change or finding the next. Or CHG BE JE WORD and work through 
all of the BH, BL, BNE and so forth. Anything you miss is easy to find: you'll 
get an addressability error message from the assembler.

I am not absolutely positive -- I fixed my problem and moved on -- but I 
*think* IEACBRCX fouled up the LE entry macro EDCPRLG. I *think* something in 
LE was expecting to see a 47 opcode specifically.

I also prefer the use of LOCTR to LARL Rn,STATIC but different strokes for 
different folks.

Charles


-----Original Message-----
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf 
Of Greg Price
Sent: Thursday, November 15, 2018 7:18 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: ASMA034E

On 2018-11-16 1:47 AM, Ward Able, Grant wrote:
> Can someone point me to a reasonably simple example?

If you can do branch instructions then you can do branch-relative
instructions. Apart from RR instructions (BR, BASR, BALR, BASSM, BSM,
BAKR and any others I've missed) replace the B that starts the branch
instruction mnemonic with BR, or as I prefer to do, with J (for jump).

eg. BNH -> JNH and BCT -> JCT and BAS -> JAS etc.

Put all the stuff which needs to be cover by a base register after all
the instructions, and start the area with a label, and "use" that.

eg.
LARL R11,Static
USING Static,R11
...

Static DC 0D  My module's constants and literals and non-RENT variables


Then all you need to cover is code generated by macros, which is why
Peter mentioned ARCHLVL (look up the SYSSTATE macro) to cover macros
with logic to test it, and the IEABRCX macro to cover the rest.

IEABRCX DEFINE
will define and activate the facility where the older "branch"
instructions will be converted to newer "branch relative" instructions
when encountered by the assembler in the source code.  With IEABRCX you
could even leave the old branch source code as-is, but personally I
prefer to use the newer mnemonics to make it obvious that the code is
probably not covered by a base register, and to keep the listing a bit
tidier.

IEABRCX is "better" than IEABRC because you can turn it on and off as
needed. The most well known scenario where you might was to turn it off
(I'd say) is if you have a branch table where you use the index register
of the branch-on-condition instruction to provide an index into a table
of branch (or even jump) instructions.

That's probably enough to get you started.  Have fun with it.

Cheers,
Greg P.

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