Hi Brian,

I did not see this sort of publications for three or four decades.

Maybe IBM zServer engineers still use some instruction timing charts during 
chip design/development.

As far as I'm concerned, my emphasis while coding is on clarity and 
readability. 

Regards,
 
On Tue, 13 Aug 2019 10:52:05 -0400, Brian Chapman <bchapma...@gmail.com> wrote:

>Thanks Giliad. This is what I was searching for. I understand that the
>timings in this document are very old and probably wildly inaccurate for
>today's Z systems, but would it be on a relative scale? Would a LR be twice
>the speed of a L?
>
>
>
>Thank you,
>
>Brian Chapman
>
>
>On Tue, Aug 13, 2019 at 10:28 AM Giliad Wilf <
>000000d50942efa9-dmarc-requ...@listserv.ua.edu> wrote:
>
>> On Mon, 12 Aug 2019 20:48:18 -0400, Brian Chapman <bchapma...@gmail.com>
>> wrote:
>>
>> >Hi everyone,
>> >
>> >I did some searching, but I didn't find anything that really discussed
>> this
>> >on the topic that I'm interested. Is there anything published that
>> compares
>> >the cycle times of the most used instructions?
>> >
>> >For example; moving an address between areas of storage. I would assume
>> >that executing a LOAD and STORE would be much quicker than executing a
>> MVC.
>> >
>> >Or executing a LOAD ADDRESS to increment a register instead of ADD HALF
>> >WORD.
>> >
>> >Or does this really matter as much as ordering the instructions so they
>> are
>> >optimized for the pipeline?
>> >
>>
>> There used to be, with every new IBM System/360 machine, a "Functional
>> Characteristics" publication stating "Instruction Times" in microseconds.
>> Here is one for the IBM System/360 Model 85:
>>
>>
>> http://www.bitsavers.org/pdf/ibm/360/funcChar/A22-6916-1_360-85_funcChar_Jun68.pdf
>>
>> See page 27.
>>

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