On Tuesday, 05/01/2007 at 03:03 EST, Brian Nielsen <[EMAIL PROTECTED]> wrote: > The z/Architecture Principles of Operations describes the information > returned by the STSI instruction from which the above values are > obtained. In particular it states (pg 10-117) that "a lower value > indicates a proportionally higher CPU capacity."
This has always puzzled me, as it puts an inherent limit on CPU capability. I won't take very many "50% capacity improvements" to get to zero which, I suppose, represents infinite capacity and will SOMEONE bring me my pills! I shouldn't worry so much.... hmmm....what will a cell processor have?!? <gaaaack!> > The definition of which engines are considered PRIMARY and which are > SECONDARY is not spelled out anywhere that I can find. My expectation was > that the engines in use by the LPAR would be defined as PRIMARY. Since > the IFL's should be faster than the non-full-speed CP's I expected the > PRIMARY to be faster, but the output from Q CAPABILITY seems to indicate > the SECONDARY CPUs are faster. This leads me to conclude that the CP's > are (always?) PRIMARY regardless of what the engines the LPAR uses. Is > that correct? If not, what is? We should have labeled those "CPs" (primary) and "Others" (secondary). The STSI information we are looking at is at the configuration (CEC) level, not the partition. In your case, yes, the secondaries are faster. IFLs, CFs, and zAAPs (and now zIIPs) run at full speed (smaller number). Your CP's are running at "subcapacity". Alan Altmark z/VM Development IBM Endicott
