Next question/problem. The folks working on z/TPF say that they have ported the code to perform IUCV from TPF 4.1 to z/TPF and have made the changes for mask bits and address requirements and do not get any IUCV interrupts on the TPF machine. The other side is a CMS machine that acts as a driver. It has not been altered in any way. I have asked the obvious question about the IUCV DECLARE BUFFER and got a reply that was an indignant "yes". And they have also unmasked by turning CR0, bit 62 on and unmasked the PSW. Do you have any idea why they would not receive the IUCV interrupts?
Regards, Richard Schuh -----Original Message----- From: The IBM z/VM Operating System [mailto:[EMAIL PROTECTED] On Behalf Of Alan Altmark Sent: Friday, July 13, 2007 3:38 PM To: [email protected] Subject: Re: IUCV Interruptions On Friday, 07/13/2007 at 06:19 EDT, Rob van der Heij <[EMAIL PROTECTED]> wrote: > On 7/13/07, Alan Altmark <[EMAIL PROTECTED]> wrote: > > > Nothing is changed. Except for the IPARML itself (I think), all > > IUCV-related addresses remain 31-bit, even in 64-bit addressing mode. So, > > all buffers must reside below 2GB. > > Virtually speaking below 2G, I presume... Yes. Alan Altmark z/VM Development IBM Endicott
