On Mon, 5 Jul 2010 10:25:57 +0100, Chris Wilson <[email protected]> wrote: > The original i965 requires an alignment of 128K for the display surface > with linear memory, so increase the requirement from 64k for these > chipsets. For the later chipsets in the i965 family, only a 4k alignment > is required. (So long as we do not start performing asynchronous flips.) > > Note the impact of this should be slight as on i965 we should be using a > tiled frontbuffer for anything up to a 4096x4096 display.
How about G35? Does it apply to that, too?
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