On Tue, Sep 07, 2010 at 10:00:28AM +0800, Zhenyu Wang wrote:
> Chris, could you help to check my sandybridge fixes? One is address mask
> fix found by Takashi, which should have been applied but I can't find it
> anywhere upstream. And others are PTE cache control fixes. 
> 
> Please check 'for-ickle' branch at 
> http://cgit.freedesktop.org/~zhen/drm-intel/

I'm currently turning the gtt code upside down. iirc you've mentioned that
snb needs to communicate new stuff between gem and the gtt code. But
there's nothing in your patches (besides the introduction of intel-gtt.h
which I've put in a different directory in my patch series, mea culpa).
Can you please elaborate into what snb needs so that I can take this into
account when designing the new gem->gtt interface? I have neither hw now
docs at hand ...

Thanks, Daniel

btw: The current state of my gtt rework is available at

http://cgit.freedesktop.org/~danvet/drm/
-- 
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to