Add render buffer info in aub file. When fulsim runs it will dump
BMP file for each requested buffer.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index c931df3..6446cba 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -38,6 +38,7 @@
#include "intel_batchbuffer.h"
#include "intel_tex.h"
#include "intel_fbo.h"
+#include "intel_bufmgr.h"
#include "brw_context.h"
#include "brw_state.h"
@@ -521,6 +522,21 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
surf.ss1.base_addr - region->buffer->offset,
I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER);
+
+ if (INTEL_DEBUG & DEBUG_AUB) {
+ struct drm_intel_aub_surface_bmp bmp = {0};
+
+ bmp.x_offset = surf.ss5.x_offset;
+ bmp.y_offset = surf.ss5.y_offset;
+ bmp.pitch = region->pitch;
+ bmp.bits_per_pixel = region->cpp * 8;
+ bmp.format = AUB_DUMP_BMP_ARGB_8888;
+ bmp.width = surf.ss2.width + 1;
+ bmp.height = surf.ss2.height + 1;
+ bmp.tiling = surf.ss3.tiled_surface;
+ bmp.tiling_walk_y = surf.ss3.tile_walk;
+ drm_intel_gem_aub_dump_bmp(intel->bufmgr, region->buffer, 0, &bmp);
+ }
}
static void
--
1.7.2.3
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