In the failure cases during rc6 initialization, both the power context and render context may get !refcount without holding struct_mutex.
However, on rc6 disabling, the lock is held by the caller. Added a simple parameter to control whether or not to acquire the lock. Signed-off-by: Ben Widawsky <[email protected]> --- drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++---- 1 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 49fb54f..790af25 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6541,10 +6541,13 @@ void intel_enable_clock_gating(struct drm_device *dev) } } -static void ironlake_teardown_rc6(struct drm_device *dev) +static void ironlake_teardown_rc6(struct drm_device *dev, bool need_lock) { struct drm_i915_private *dev_priv = dev->dev_private; + if (need_lock) + mutex_lock(&dev->struct_mutex); + if (dev_priv->renderctx) { i915_gem_object_unpin(dev_priv->renderctx); drm_gem_object_unreference(&dev_priv->renderctx->base); @@ -6556,6 +6559,9 @@ static void ironlake_teardown_rc6(struct drm_device *dev) drm_gem_object_unreference(&dev_priv->pwrctx->base); dev_priv->pwrctx = NULL; } + + if (need_lock) + mutex_unlock(&dev->struct_mutex); } static void ironlake_disable_rc6(struct drm_device *dev) @@ -6575,7 +6581,7 @@ static void ironlake_disable_rc6(struct drm_device *dev) POSTING_READ(RSTDBYCTL); } - ironlake_teardown_rc6(dev); + ironlake_teardown_rc6(dev, false); } static int ironlake_setup_rc6(struct drm_device *dev) @@ -6590,7 +6596,7 @@ static int ironlake_setup_rc6(struct drm_device *dev) if (dev_priv->pwrctx == NULL) dev_priv->pwrctx = intel_alloc_context_page(dev); if (!dev_priv->pwrctx) { - ironlake_teardown_rc6(dev); + ironlake_teardown_rc6(dev, true); return -ENOMEM; } @@ -6618,7 +6624,7 @@ void ironlake_enable_rc6(struct drm_device *dev) */ ret = BEGIN_LP_RING(6); if (ret) { - ironlake_teardown_rc6(dev); + ironlake_teardown_rc6(dev, true); return; } -- 1.7.3.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
