Ted Phelps writes:
> Chris Wilson writes:
> > Whenever we finish reading an object through a fence, for safety we
> > clear any GPU read domain and so invalidate any TLBs associated with
> > the fenced region upon its next use.
>
> This change is causing a regression on my Sandybridge CPU (i7 2600K).
> The colours all look right, but the pixels aren't in the right order.
> I'll try to get a screen shot for you.
Grr... Sorry, I've replied to the wrong patch. That one is fine. This
is the problematic one:
commit fc8cf546f12a353bfd344bf922649c0d064fc3f0
Author: Chris Wilson <[email protected]>
Date: Fri Mar 18 19:39:59 2011 +0000
drm/i915: Cleanup handling of last_fenced_seqno
Cc: Andy Whitcroft <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Reviewed-by: Daniel Vetter <[email protected]>
>From drm-intel-staging.
-Ted
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
