On Fri, Mar 25, 2011 at 07:07:48PM -0700, Ben Widawsky wrote: > > Chris, do you already have something like this queued up? > > I don't have a SNB with which to test this patch right now. I'd like to > know if anyone has any major issues with this, because I intend to use > this to enable userspace to properly read and write registers on SNB.
So right after hitting 'y' I realized how much I detest this. It leaves buggy usespace the opportunity to allow the GPU to never sleep. However, I'd really like to find a solution to allow intel_reg_read and intel_reg_write to work properly on GEN6. Chris' idea from IRC of using LOAD/STORE_REGISTER will not work unless we use a secure batch buffer. The only other option floating around is IOCTLs to read/write the registers, which previously seemed like a bad idea, but is now looking like the only option. Ben _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
