On 03/29/2011 03:17 PM, Eric Anholt wrote:
---
I don't have GT1 to test with. Does this fix VS regressions for
people with that hardware?
Me neither, but it sure looks correct.
[snip]
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 9483ec6..a74ba5c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -183,8 +183,17 @@ GLboolean brwCreateContext( int api,
/* WM maximum threads is number of EUs times number of threads per EU. */
if (intel->gen>= 6) {
brw->urb.size = 1024;
- brw->vs_max_threads = 60;
- brw->wm_max_threads = 80;
+ if (IS_GT2(intel->intelScreen->deviceID)) {
+ /* This could possibly be 80, but is supposed to require
+ * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
+ * GPU reset to change.
+ */
+ brw->wm_max_threads = 40;
+ brw->vs_max_threads = 60;
+ } else {
+ brw->wm_max_threads = 40;
+ brw->vs_max_threads = 24;
+ }
Presumably 60 = 12 EUs * 5 threads/EU (for GT2), while 24 = 6 EUs * 4
threads/EU (for GT1). If so, a comment to that effect would be nice...
I still have no idea where 40/80 come from.
[snip]
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h
b/src/mesa/drivers/dri/intel/intel_chipset.h
index 4ff9140..f7dcf47 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
Drop the intel_chipset.h changes, I just committed an equivalent patch.
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
