These are exactly the same as the ones for Sandybridge, but with message registers translated (hopefully) in the same way as Haihao's new programs (m1 == g65).
Signed-off-by: Kenneth Graunke <[email protected]> --- src/i965_render.c | 95 +++++++++++++++++++++++- src/render_program/exa_wm_mask_affine.g7a | 41 ++++++++++ src/render_program/exa_wm_mask_affine.g7b | 4 + src/render_program/exa_wm_mask_projective.g7a | 63 ++++++++++++++++ src/render_program/exa_wm_mask_projective.g7b | 12 +++ src/render_program/exa_wm_mask_sample_a.g7a | 49 ++++++++++++ src/render_program/exa_wm_mask_sample_a.g7b | 3 + src/render_program/exa_wm_mask_sample_argb.g7a | 49 ++++++++++++ src/render_program/exa_wm_mask_sample_argb.g7b | 3 + src/render_program/exa_wm_src_projective.g7a | 63 ++++++++++++++++ src/render_program/exa_wm_src_projective.g7b | 12 +++ src/render_program/exa_wm_src_sample_a.g7a | 48 ++++++++++++ src/render_program/exa_wm_src_sample_a.g7b | 3 + 13 files changed, 442 insertions(+), 3 deletions(-) create mode 100644 src/render_program/exa_wm_mask_affine.g7a create mode 100644 src/render_program/exa_wm_mask_affine.g7b create mode 100644 src/render_program/exa_wm_mask_projective.g7a create mode 100644 src/render_program/exa_wm_mask_projective.g7b create mode 100644 src/render_program/exa_wm_mask_sample_a.g7a create mode 100644 src/render_program/exa_wm_mask_sample_a.g7b create mode 100644 src/render_program/exa_wm_mask_sample_argb.g7a create mode 100644 src/render_program/exa_wm_mask_sample_argb.g7b create mode 100644 src/render_program/exa_wm_src_projective.g7a create mode 100644 src/render_program/exa_wm_src_projective.g7b create mode 100644 src/render_program/exa_wm_src_sample_a.g7a create mode 100644 src/render_program/exa_wm_src_sample_a.g7b diff --git a/src/i965_render.c b/src/i965_render.c index b76107d..5ab53c4 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -538,6 +538,74 @@ static const uint32_t ps_kernel_masknoca_projective_static_gen6[][4] = { #include "exa_wm_write.g6b" }; +/* programs for GEN7 */ +static const uint32_t ps_kernel_nomask_affine_static_gen7[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_nomask_projective_static_gen7[][4] = { +#include "exa_wm_src_projective.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_maskca_affine_static_gen7[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_mask_affine.g7b" +#include "exa_wm_mask_sample_argb.g7b" +#include "exa_wm_ca.g6b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_maskca_projective_static_gen7[][4] = { +#include "exa_wm_src_projective.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_mask_projective.g7b" +#include "exa_wm_mask_sample_argb.g7b" +#include "exa_wm_ca.g4b.gen5" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen7[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_a.g7b" +#include "exa_wm_mask_affine.g7b" +#include "exa_wm_mask_sample_argb.g7b" +#include "exa_wm_ca_srcalpha.g6b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen7[][4] = { +#include "exa_wm_src_projective.g7b" +#include "exa_wm_src_sample_a.g7b" +#include "exa_wm_mask_projective.g7b" +#include "exa_wm_mask_sample_argb.g7b" +#include "exa_wm_ca_srcalpha.g6b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_masknoca_affine_static_gen7[][4] = { +#include "exa_wm_src_affine.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_mask_affine.g7b" +#include "exa_wm_mask_sample_a.g7b" +#include "exa_wm_noca.g6b" +#include "exa_wm_write.g7b" +}; + +static const uint32_t ps_kernel_masknoca_projective_static_gen7[][4] = { +#include "exa_wm_src_projective.g7b" +#include "exa_wm_src_sample_argb.g7b" +#include "exa_wm_mask_projective.g7b" +#include "exa_wm_mask_sample_a.g7b" +#include "exa_wm_noca.g6b" +#include "exa_wm_write.g7b" +}; + + typedef enum { SAMPLER_STATE_FILTER_NEAREST, SAMPLER_STATE_FILTER_BILINEAR, @@ -629,6 +697,25 @@ static const struct wm_kernel_info wm_kernels_gen6[] = { ps_kernel_masknoca_projective_static_gen6, TRUE), }; +static const struct wm_kernel_info wm_kernels_gen7[] = { + KERNEL(WM_KERNEL_NOMASK_AFFINE, + ps_kernel_nomask_affine_static_gen7, FALSE), + KERNEL(WM_KERNEL_NOMASK_PROJECTIVE, + ps_kernel_nomask_projective_static_gen7, FALSE), + KERNEL(WM_KERNEL_MASKCA_AFFINE, + ps_kernel_maskca_affine_static_gen7, TRUE), + KERNEL(WM_KERNEL_MASKCA_PROJECTIVE, + ps_kernel_maskca_projective_static_gen7, TRUE), + KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE, + ps_kernel_maskca_srcalpha_affine_static_gen7, TRUE), + KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, + ps_kernel_maskca_srcalpha_projective_static_gen7, TRUE), + KERNEL(WM_KERNEL_MASKNOCA_AFFINE, + ps_kernel_masknoca_affine_static_gen7, TRUE), + KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE, + ps_kernel_masknoca_projective_static_gen7, TRUE), +}; + #undef KERNEL typedef struct _brw_cc_unit_state_padded { @@ -2665,6 +2752,7 @@ gen6_render_state_init(ScrnInfoPtr scrn) struct gen4_render_state *render; int i, j, k, l, m; drm_intel_bo *border_color_bo; + const struct wm_kernel_info *wm_kernels; render= intel->gen4_render_state; render->composite_op.vertex_id = -1; @@ -2675,12 +2763,13 @@ gen6_render_state_init(ScrnInfoPtr scrn) intel->gen6_render_state.kernel = NULL; intel->gen6_render_state.drawrect = -1; + wm_kernels = IS_GEN7(intel) ? wm_kernels_gen7 : wm_kernels_gen6; for (m = 0; m < KERNEL_COUNT; m++) { render->wm_kernel_bo[m] = intel_bo_alloc_for_data(intel, - wm_kernels_gen6[m].data, - wm_kernels_gen6[m].size, - "WM kernel gen6"); + wm_kernels[m].data, + wm_kernels[m].size, + "WM kernel gen6/7"); } border_color_bo = sampler_border_color_create(intel); diff --git a/src/render_program/exa_wm_mask_affine.g7a b/src/render_program/exa_wm_mask_affine.g7a new file mode 100644 index 0000000..4277080 --- /dev/null +++ b/src/render_program/exa_wm_mask_affine.g7a @@ -0,0 +1,41 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `g72') +define(`uh', `g73') +define(`vl', `g74') +define(`vh', `g75') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g8.0<0,1,0>F') +define(`a0_a_y',`g8.16<0,1,0>F') + +include(`exa_wm_affine.g6i') diff --git a/src/render_program/exa_wm_mask_affine.g7b b/src/render_program/exa_wm_mask_affine.g7b new file mode 100644 index 0000000..8d72599 --- /dev/null +++ b/src/render_program/exa_wm_mask_affine.g7b @@ -0,0 +1,4 @@ + { 0x0060005a, 0x290077bd, 0x00000100, 0x008d0040 }, + { 0x0060005a, 0x292077bd, 0x00000100, 0x008d0080 }, + { 0x0060005a, 0x294077bd, 0x00000110, 0x008d0040 }, + { 0x0060005a, 0x296077bd, 0x00000110, 0x008d0080 }, diff --git a/src/render_program/exa_wm_mask_projective.g7a b/src/render_program/exa_wm_mask_projective.g7a new file mode 100644 index 0000000..ba4158f --- /dev/null +++ b/src/render_program/exa_wm_mask_projective.g7a @@ -0,0 +1,63 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`u', `g72') +define(`ul', `g72') +define(`uh', `g73') +define(`v', `g74') +define(`vl', `g74') +define(`vh', `g75') +define(`w', `mask_w') +define(`wl', `mask_w_0') +define(`wh', `mask_w_1') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g8.0<0,1,0>F') +define(`a0_a_y',`g8.16<0,1,0>F') +define(`a0_a_z',`g9.0<0,1,0>F') + +/* W */ +pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ +math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; +math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; + +/* U */ +pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ +mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; +mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; + +/* V */ +pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ +mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; +mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; diff --git a/src/render_program/exa_wm_mask_projective.g7b b/src/render_program/exa_wm_mask_projective.g7b new file mode 100644 index 0000000..a2e9267 --- /dev/null +++ b/src/render_program/exa_wm_mask_projective.g7b @@ -0,0 +1,12 @@ + { 0x0060005a, 0x23c077bd, 0x00000120, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x00000120, 0x008d0080 }, + { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, + { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, + { 0x0060005a, 0x23c077bd, 0x00000100, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x00000100, 0x008d0080 }, + { 0x00600041, 0x290077bd, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x292077bd, 0x008d03e0, 0x008d01a0 }, + { 0x0060005a, 0x23c077bd, 0x00000110, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x00000110, 0x008d0080 }, + { 0x00600041, 0x294077bd, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x296077bd, 0x008d03e0, 0x008d01a0 }, diff --git a/src/render_program/exa_wm_mask_sample_a.g7a b/src/render_program/exa_wm_mask_sample_a.g7a new file mode 100644 index 0000000..a0d38e1 --- /dev/null +++ b/src/render_program/exa_wm_mask_sample_a.g7a @@ -0,0 +1,49 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <[email protected]> + * Keith Packard <[email protected]> + */ + +/* Sample the mask surface */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load only alpha */ +mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; +mov (8) g71<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ + +/* g71 will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) 71 /* msg reg index */ + mask_sample_a_01<1>UW /* readback */ + null + sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + diff --git a/src/render_program/exa_wm_mask_sample_a.g7b b/src/render_program/exa_wm_mask_sample_a.g7b new file mode 100644 index 0000000..fa36a59 --- /dev/null +++ b/src/render_program/exa_wm_mask_sample_a.g7b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, + { 0x00600001, 0x28e00021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x23801ca9, 0x000008e0, 0x0a2c0102 }, diff --git a/src/render_program/exa_wm_mask_sample_argb.g7a b/src/render_program/exa_wm_mask_sample_argb.g7a new file mode 100644 index 0000000..984b622 --- /dev/null +++ b/src/render_program/exa_wm_mask_sample_argb.g7a @@ -0,0 +1,49 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <[email protected]> + * Keith Packard <[email protected]> + */ + +/* Sample the mask surface */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; +mov (8) g71<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ + +/* g71 will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) 71 /* msg reg index */ + mask_sample_base<1>UW /* readback */ + null + sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + diff --git a/src/render_program/exa_wm_mask_sample_argb.g7b b/src/render_program/exa_wm_mask_sample_argb.g7b new file mode 100644 index 0000000..01edf7d --- /dev/null +++ b/src/render_program/exa_wm_mask_sample_argb.g7b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22c01ca9, 0x000008e0, 0x0a8c0102 }, diff --git a/src/render_program/exa_wm_src_projective.g7a b/src/render_program/exa_wm_src_projective.g7a new file mode 100644 index 0000000..9fd495c --- /dev/null +++ b/src/render_program/exa_wm_src_projective.g7a @@ -0,0 +1,63 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`u', `g66') +define(`ul', `g66') +define(`uh', `g67') +define(`v', `src_v') +define(`vl', `src_v') +define(`vh', `g69') +define(`w', `src_w') +define(`wl', `src_w_0') +define(`wh', `src_w_1') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g6.0<0,1,0>F') +define(`a0_a_y',`g6.16<0,1,0>F') +define(`a0_a_z',`g7.0<0,1,0>F') + +/* W */ +pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ +math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; +math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; + +/* U */ +pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ +mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; +mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; + +/* V */ +pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ +mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; +mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; diff --git a/src/render_program/exa_wm_src_projective.g7b b/src/render_program/exa_wm_src_projective.g7b new file mode 100644 index 0000000..73727ff --- /dev/null +++ b/src/render_program/exa_wm_src_projective.g7b @@ -0,0 +1,12 @@ + { 0x0060005a, 0x23c077bd, 0x000000e0, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x000000e0, 0x008d0080 }, + { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, + { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, + { 0x0060005a, 0x23c077bd, 0x000000c0, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x000000c0, 0x008d0080 }, + { 0x00600041, 0x284077bd, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x286077bd, 0x008d03e0, 0x008d01a0 }, + { 0x0060005a, 0x23c077bd, 0x000000d0, 0x008d0040 }, + { 0x0060005a, 0x23e077bd, 0x000000d0, 0x008d0080 }, + { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x28a077bd, 0x008d03e0, 0x008d01a0 }, diff --git a/src/render_program/exa_wm_src_sample_a.g7a b/src/render_program/exa_wm_src_sample_a.g7a new file mode 100644 index 0000000..d5d24fd --- /dev/null +++ b/src/render_program/exa_wm_src_sample_a.g7a @@ -0,0 +1,48 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <[email protected]> + * Keith Packard <[email protected]> + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load alpha */ +mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; +mov (8) g65<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ + +/* g65 will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) 65 /* msg reg index */ + src_sample_a_01<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ diff --git a/src/render_program/exa_wm_src_sample_a.g7b b/src/render_program/exa_wm_src_sample_a.g7b new file mode 100644 index 0000000..73912b7 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_a.g7b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, + { 0x00600001, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22801ca9, 0x00000820, 0x0a2c0001 }, -- 1.7.4.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
