After writing to the plane control reg we need to write to the surface reg to trigger the double buffered register latch.
Signed-off-by: Jesse Barnes <[email protected]> --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 32ffde2..9fefba3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1333,6 +1333,8 @@ static void intel_disable_plane(struct drm_i915_private *dev_priv, return; I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE); + /* Flush out the double buffered plane control reg */ + I915_WRITE(DSPSURF(plane), I915_READ(DSPSURF(plane))); intel_flush_display_plane(dev_priv, plane); intel_wait_for_vblank(dev_priv->dev, pipe); } -- 1.7.4.1 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
