On Tue, Oct 04, 2011 at 05:53:08PM +0800, meteor wrote: > We are developing a Linux solution. Our platform is using Intel SandyBridge > and its VGA > (kernel 2.6.35.8, 915 KMS driver). > > We found system will show garbage at the moment VGA is hand over to OS after > BIOS POST. > The symptom doesn’t happen in WIN 7. > After checking with EE, the LCD_VDD_EN pin is pull low again when boot to > Win 7. > However, this pin is not pull low when boot to Linux. > > After BIOS POST, there’s a power reset during driver loading for resolution > pattern sending. > It’s why driver needs to control PCH "L_VDD_EN" for power reset, and the > panel spec suggests to > have VDD power off for >=500ms. > > Please refer to the VDD power monitoring image: > http://imageshack.us/photo/my-images/827/auoi.jpg/ > > Need help to fix the issue in driver.
Sounds like you need Keith's eDP power sequencing rework. Afaik you can grab the latest version here: http://cgit.freedesktop.org/~keithp/linux/log/?h=macbook-air Testing feedback highly welcome (and with some details about the panel type/hw, if possible). Yours, Daniel -- Daniel Vetter Mail: [email protected] Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
