On Mon, 17 Oct 2011 13:03:02 -0400, Adam Jackson <[email protected]> wrote:
> [drm:drm_mode_debug_printmodeline], Modeline 28:"" 0 154000 1920 1968 2000 > 2080 1200 1203 1209 1235 0x0 0x9 > [drm:intel_dp_mode_fixup], Display port link bw 0a lane count 2 clock > 270000 Ok, nice to see that you've actually tested a marginal case and had it work :-) Acked-by: Keith Packard <[email protected]> -- [email protected]
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