Hi, A collection of nits below.
Thanks, -Olof On Thu, Nov 10, 2011 at 07:48:55PM -0800, Simon Que wrote: > If the firmware did not initialize the backlight PWM registers, set up a > default PWM frequency of 200 Hz. This is determined using the following > formula: > > freq = refclk / (128 * pwm_max) > > The PWM register allows the max PWM value to be set. So we want to use > the formula, where freq = 200: > > pwm_max = refclk / (128 * freq) > > This patch will, in the case of missing PWM register initialization > values, look for the reference clock frequency. Based on that, it sets > an appropriate max PWM value for a frequency of 200 Hz. > > If no refclk frequency is found, the max PWM will be zero, which results > in no change to the PWM registers. > > Signed-off-by: Simon Que <[email protected]> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_panel.c | 37 +++++++++++++++++++++++++++++------ > 2 files changed, 31 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 5d5def7..a832028 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -3275,6 +3275,7 @@ > #define PWM_POLARITY_ACTIVE_HIGH2 (0 << 28) > > #define BLC_PWM_PCH_CTL2 0xc8254 > +#define BLC_PWM_PCH_FREQ_SHIFT 16 > > #define PCH_PP_STATUS 0xc7200 > #define PCH_PP_CONTROL 0xc7204 > diff --git a/drivers/gpu/drm/i915/intel_panel.c > b/drivers/gpu/drm/i915/intel_panel.c > index f15388c..f865e52 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -32,6 +32,10 @@ > > #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ > > +/* For computing default PWM settings */ > +#define DEFAULT_BACKLIGHT_PWM_FREQ 200 > +#define BACKLIGHT_REFCLK_DIVISOR 128 I would a bit more comment above. Maybe something like: /* These are used to calculate a reasonable default when firmware has not * configured a maximum PWM frequency, with 200Hz as current target. */ > + > void > intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, > struct drm_display_mode *adjusted_mode) > @@ -129,12 +133,31 @@ static int is_backlight_combination_mode(struct > drm_device *dev) > return 0; > } > > +static u32 i915_get_default_max_backlight(struct drm_i915_private *dev_priv) Having a 'get' function that has side effects is misleading. 'i915_set_default_max_backlight' is a better name (and not returning the new max). > +{ > + u32 refclk_freq_mhz = 0; > + u32 max_pwm = 0; No need to set max_pwm to 0. Empty line between variables and code. > + if (HAS_PCH_SPLIT(dev_priv->dev)) > + refclk_freq_mhz = I915_READ(PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK; > + else if (dev_priv->lvds_use_ssc) > + refclk_freq_mhz = dev_priv->lvds_ssc_freq; > + > + max_pwm = refclk_freq_mhz * 1000000 / > + (BACKLIGHT_REFCLK_DIVISOR * DEFAULT_BACKLIGHT_PWM_FREQ); > + > + if (HAS_PCH_SPLIT(dev_priv->dev)) > + dev_priv->saveBLC_PWM_CTL2 = max_pwm << BLC_PWM_PCH_FREQ_SHIFT; > + else > + dev_priv->saveBLC_PWM_CTL = max_pwm << > + BACKLIGHT_MODULATION_FREQ_SHIFT; > + return max_pwm; > +} > + > static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) > { > u32 val; > > - /* Restore the CTL value if it lost, e.g. GPU reset */ > - > + /* Restore the CTL value if it was lost, e.g. GPU reset */ > if (HAS_PCH_SPLIT(dev_priv->dev)) { > val = I915_READ(BLC_PWM_PCH_CTL2); > if (dev_priv->saveBLC_PWM_CTL2 == 0) { > @@ -168,11 +191,11 @@ u32 intel_panel_get_max_backlight(struct drm_device > *dev) > > max = i915_read_blc_pwm_ctl(dev_priv); > if (max == 0) { > - /* XXX add code here to query mode clock or hardware clock > - * and program max PWM appropriately. > - */ > - printk_once(KERN_WARNING "fixme: max PWM is zero.\n"); > - return 1; > + /* If backlight PWM registers have not been set, set them to */ > + /* default backlight PWM settings. */ /* Kernel multi-line comment style * is like this. */ > + max = i915_get_default_max_backlight(dev_priv); > + i915_read_blc_pwm_ctl(dev_priv); max = i915_read_.. > + return max; If you return here you won't be doing the same math as below, that looks like a bug. > } > > if (HAS_PCH_SPLIT(dev)) { -Olof _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
