We don't need to check 3rd pipe specifically, as it shares PLL with some other one.
(v2 - for stable kernel: clarify bug description to explain that this fixes suspend when 3rd pipe is active - fd.o bug #41977). Upstream commit: commit 07c1e8c1462fa7324de4c36ae9e55da2abd79cee Author: Eugeni Dodonov <[email protected]> Date: Sat Jan 7 23:40:35 2012 -0200 drm/i915: handle 3rd pipe Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41977 Signed-off-by: Eugeni Dodonov <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Keith Packard <[email protected]> Signed-off-by: Eugeni Dodonov <[email protected]> --- drivers/gpu/drm/i915/i915_suspend.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 7886e4f..b815140 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -34,6 +34,10 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) struct drm_i915_private *dev_priv = dev->dev_private; u32 dpll_reg; + /* On IVB, 3rd pipe shares PLL with another one */ + if (pipe > 1) + return false; + if (HAS_PCH_SPLIT(dev)) dpll_reg = (pipe == PIPE_A) ? _PCH_DPLL_A : _PCH_DPLL_B; else -- 1.7.8.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
