Thanks for the review, Ben. Yes, I was a bit paranoid about what values could be in gtt_offset. But if it's always a multiple of 0x1000, we can save an additional mask operation. I'll make the change and resubmit.
Armin -----Original Message----- From: Ben Widawsky [mailto:[email protected]] Sent: Friday, April 06, 2012 4:26 PM To: Reese, Armin C Cc: [email protected] Subject: Re: [Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers On Thu, 5 Apr 2012 20:48:20 +0000 "Reese, Armin C" <[email protected]> wrote: > The patch file for this change is attached. Had to send it from > Outlook and wanted to avoid corrupting the patch. Hence, the > attachment. > > Armin I don't know about the pipe stuff, but anything with gtt_offset should always be PAGE_OFFSET, and so most of the macro stuff is way overkill there. The only change is when you compare DISPSURF to gtt_offset, where it would be easier to just use PAGE_MASK. Ben _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
