On Fri, 13 Apr 2012 18:39:24 -0700 Ben Widawsky <[email protected]> wrote:
> On Sat, 14 Apr 2012 00:24:03 +0100 > Chris Wilson <[email protected]> wrote: > > > On Fri, 13 Apr 2012 16:05:14 -0700, Ben Widawsky <[email protected]> > > wrote: > > > Dumb binary interfaces which allow root-only updates of our cache > > > remapping registers. See intel-gpu-tools for how this can/should > > > be used. > > > > Initial comments: don't bother posting a read just before a read, > > and do return errors from the sysfs read/write functions (the return > > value is signed for that purpose). A lesser issue is that if you are > > worried about necessity of posting-reads, you should also worry > > about the effect of the weak ordering of writes. > > -Chris > > > > Thanks for the advice on the sysfs return values. Some of the code I > was referring from just returns 0, but this seems to be not the right > thing to do after looking further into it. > > As for the POSTING_READ it was intentional. Unless reads are always in > order??? I have to make sure the clock gating disable propogates > before I can read the L3 registers. > On further thought, yeah - you are right. _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
