On Sat, Apr 14, 2012 at 10:24:21AM +0100, Chris Wilson wrote:
> If the hardware is dead, we can simply discard any outstanding writes
> from the GPU and presume the buffer is either in the GTT domain or
> already in the CPU domain and continue on flushing the CPU caches.
> 
> Signed-off-by: Chris Wilson <[email protected]>

Pardon my ignorance, but I fail to see the goal of these -EIO patches ...
Care to mind the dense?
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_gem.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 19ca320..80fb67d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3087,12 +3087,12 @@ i915_gem_object_set_to_cpu_domain(struct 
> drm_i915_gem_object *obj, bool write)
>               return 0;
>  
>       ret = i915_gem_object_flush_gpu_write_domain(obj);
> -     if (ret)
> +     if (ret && ret != -EIO)
>               return ret;
>  
>       if (write || obj->pending_gpu_write) {
>               ret = i915_gem_object_wait_rendering(obj);
> -             if (ret)
> +             if (ret && ret != -EIO)
>                       return ret;
>       }
>  
> -- 
> 1.7.10
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Mail: [email protected]
Mobile: +41 (0)79 365 57 48
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to