On Thu, Apr 19, 2012 at 03:47:44PM +0100, Chris Wilson wrote: > On Thu, 19 Apr 2012 16:45:22 +0200, Daniel Vetter <[email protected]> > wrote: > > It looks like we also need to flush the render cache when we just > > invalidate it. This fixes a regression in i-g-t/gem_tiled_blits on my > > i855gm. I guess the render cache there is virtually indexed, so we > > need to clean it when changing gtt mappings. > > > > This regression has been introduce in > > > > commit 46f0f8d120c4afae53a5670bf3ac80a928340ff3 > > Author: Chris Wilson <[email protected]> > > Date: Wed Apr 18 11:12:11 2012 +0100 > > > > drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSH > > > > Cc: Chris Wilson <[email protected]> > > Signed-Off-by: Daniel Vetter <[email protected]> > > My fault, with hindsight comes wisdom, > Reviewed-by: Chris Wilson <[email protected]>
Queued for -next, thanks for the review. I think I'll keep dinq at this and push out a new -testing for QA today or tomorrow. Furious patch mergin will commence again next week. -Daniel -- Daniel Vetter Mail: [email protected] Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
