This is the last bit required for making nonblocking modesets work
correctly. The state in intel_crtc->hw_ddb is not updated until
somewhere in atomic commit, while the previous crtc state should be
accurate if the ddb hasn't changed.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 drivers/gpu/drm/i915/intel_pm.c      | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d3d7d9dc14a8..93e16da0aa51 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14332,7 +14332,7 @@ static void skl_update_crtcs(struct drm_atomic_state 
*state,
                         * new ddb allocation to take effect.
                         */
                        if (!skl_ddb_entry_equal(&cstate->wm.skl.ddb,
-                                                &intel_crtc->hw_ddb) &&
+                                                
&to_intel_crtc_state(old_crtc_state)->wm.skl.ddb) &&
                            !crtc->state->active_changed &&
                            intel_state->wm_results.dirty_pipes != updated)
                                vbl_wait = true;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 18c62d1eea19..182e6b30b60a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3091,7 +3091,11 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device 
*dev,
         * we currently hold.
         */
        if (!intel_state->active_pipe_changes) {
-               *alloc = to_intel_crtc(for_crtc)->hw_ddb;
+               /*
+                * alloc may be cleared by clear_intel_crtc_state,
+                * copy from old state to be sure
+                */
+               *alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb;
                return;
        }
 
-- 
2.7.4

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