On Tue, Nov 08, 2016 at 01:55:34PM +0100, Maarten Lankhorst wrote:
> This is the last bit required for making nonblocking modesets work
> correctly. The state in intel_crtc->hw_ddb is not updated until
> somewhere in atomic commit, while the previous crtc state should be
> accurate if the ddb hasn't changed.

The "somewhere in atomic commit" part of the commit message here is a
little bit confusing given that the change to skl_update_crtcs is
happening "somewhere in atomic commit."  The key being that your
comparison happens earlier in the commit phase than the hw_ddb update.
I'm not sure exactly how best to word that, but if you can convey that
in the commit message, then the changes here look fine so

Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>

> 
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/intel_pm.c      | 6 +++++-
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index abfcaa07bbe3..69f9addb29b3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14313,7 +14313,7 @@ static void skl_update_crtcs(struct drm_atomic_state 
> *state,
>                        * new ddb allocation to take effect.
>                        */
>                       if (!skl_ddb_entry_equal(&cstate->wm.skl.ddb,
> -                                              &intel_crtc->hw_ddb) &&
> +                                              
> &to_intel_crtc_state(old_crtc_state)->wm.skl.ddb) &&
>                           !crtc->state->active_changed &&
>                           intel_state->wm_results.dirty_pipes != updated)
>                               vbl_wait = true;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 93e261300ef0..bde6c68eb0db 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3118,7 +3118,11 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device 
> *dev,
>        * we currently hold.
>        */
>       if (!intel_state->active_pipe_changes) {
> -             *alloc = to_intel_crtc(for_crtc)->hw_ddb;
> +             /*
> +              * alloc may be cleared by clear_intel_crtc_state,
> +              * copy from old state to be sure
> +              */
> +             *alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb;
>               return;
>       }
>  
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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