== Series Details == Series: series starting with [CI,01/10] drm/i915: Give each sw_fence its own lockclass URL : https://patchwork.freedesktop.org/series/15303/ State : warning
== Summary == Series 15303v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/15303/revisions/1/mbox/ Test drv_module_reload_basic: pass -> DMESG-WARN (fi-skl-6770hq) fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15 fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28 fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28 fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32 fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20 fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20 fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53 fi-ivb-3520m total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22 fi-ivb-3770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22 fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22 fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14 fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21 fi-skl-6770hq total:244 pass:229 dwarn:1 dfail:0 fail:0 skip:14 fi-snb-2520m total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32 fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33 1ff093811f7fdf9b63a9fac336269f2083f1b433 drm-intel-nightly: 2016y-11m-14d-18h-30m-41s UTC integration manifest 43d7bf2 drm/i915/scheduler: Boost priorities for flips fad7db5 drm/i915: Store the execution priority on the context 18c62cb drm/i915/scheduler: Execute requests in order of priorities 0239870 drm/i915/scheduler: Record all dependencies upon request construction b960818 drm/i915/scheduler: Signal the arrival of a new request ba8b842 drm/i915: Remove engine->execlist_lock bfc599f drm/i915: Defer transfer onto execution timeline to actual hw submission 3c07427 drm/i915: Split request submit/execute phase into two 0468d41 drm/i915: Create distinct lockclasses for execution vs user timelines 01db6b2 drm/i915: Give each sw_fence its own lockclass == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2989/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
