The patches in this list enable MIPI DSI video mode support for GLK platform. Tesed locally. v2: Renamed bitfields macros as per review comments(Jani)
Deepak M (7): drm/i915/glk: Add new bit fields in MIPI CTRL register drm/i915/glk: Program new MIPI DSI PHY registers for GLK drm/i915/glk: Add MIPIIO Enable/disable sequence drm/i915: Set the Z inversion overlap field drm/i915/glk: Add DSI PLL divider range for glk drm/i915i/glk: Program MIPI_CLOCK_CTRL only for BXT drm/i915/glk: Program txesc clock divider for GLK Madhav Chauhan (1): drm/i915/glk: Program dphy param reg for GLK Vincente Tsou (1): drm/915: Parsing the missed out DTD fields from the VBT drivers/gpu/drm/i915/i915_reg.h | 42 ++++++++ drivers/gpu/drm/i915/intel_bios.c | 8 +- drivers/gpu/drm/i915/intel_dsi.c | 166 ++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 33 ++++-- drivers/gpu/drm/i915/intel_dsi_pll.c | 106 ++++++++++++++---- drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +- 6 files changed, 327 insertions(+), 34 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
