From: Ville Syrjälä <ville.syrj...@linux.intel.com>
Relocate the vlv/chv wm state to live under intel_crtc_state. Note
that for now this just behaves as a temporary storage. But it'll be
easier to conver the thing over to properly pre-computing the state
when it's already in the right place.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
drivers/gpu/drm/i915/intel_drv.h | 30 +++++++++++++++++++++---------
drivers/gpu/drm/i915/intel_pm.c | 32 ++++++++++++++++----------------
2 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f4ba686e3e22..82caf4f4a02b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -488,6 +488,22 @@ struct skl_pipe_wm {
uint32_t linetime;
};
+enum vlv_wm_level {
+ VLV_WM_LEVEL_PM2,
+ VLV_WM_LEVEL_PM5,
+ VLV_WM_LEVEL_DDR_DVFS,
+ NUM_VLV_WM_LEVELS,
+};
+
+struct vlv_wm_state {
+ struct vlv_pipe_wm wm[NUM_VLV_WM_LEVELS];
+ struct vlv_sr_wm sr[NUM_VLV_WM_LEVELS];
+ uint8_t num_active_planes;
+ uint8_t num_levels;
+ uint8_t level;
+ bool cxsr;
+};
+
struct intel_crtc_wm_state {
union {
struct {
@@ -512,6 +528,11 @@ struct intel_crtc_wm_state {
struct skl_pipe_wm optimal;
struct skl_ddb_entry ddb;
} skl;
+
+ struct {
+ /* inverted optimal watermarks */
+ struct vlv_wm_state optimal;
+ } vlv;
};
/*
@@ -696,15 +717,6 @@ struct intel_crtc_state {
u8 active_planes;
};
-struct vlv_wm_state {
- struct vlv_pipe_wm wm[3];
- struct vlv_sr_wm sr[3];
- uint8_t num_active_planes;
- uint8_t num_levels;
- uint8_t level;
- bool cxsr;
-};
-
struct vlv_fifo_state {
uint16_t plane[I915_MAX_PLANES];
};
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b29b05a195d8..507e49cd6e4a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -947,12 +947,6 @@ static void vlv_write_wm_values(struct drm_i915_private
*dev_priv,
#undef FW_WM_VLV
-enum vlv_wm_level {
- VLV_WM_LEVEL_PM2,
- VLV_WM_LEVEL_PM5,
- VLV_WM_LEVEL_DDR_DVFS,
-};
-
/* latency must be in 0.1us units. */
static unsigned int vlv_wm_method2(unsigned int pixel_rate,
unsigned int pipe_htotal,
@@ -1023,9 +1017,10 @@ static uint16_t vlv_compute_wm_level(const struct
intel_crtc_state *crtc_state,
return min_t(int, wm, USHRT_MAX);
}
-static void vlv_compute_fifo(struct intel_crtc *crtc)
+static void vlv_compute_fifo(struct intel_crtc_state *crtc_state)
{
- struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
struct vlv_fifo_state *fifo_state = &crtc->wm.fifo_state;
struct drm_device *dev = crtc->base.dev;
struct intel_plane *plane;
@@ -1099,9 +1094,10 @@ static u16 vlv_invert_wm_value(u16 wm, u16 fifo_size)
return fifo_size - wm;
}
-static void vlv_invert_wms(struct intel_crtc *crtc)
+static void vlv_invert_wms(struct intel_crtc_state *crtc_state)
{
- struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
int level;
for (level = 0; level < wm_state->num_levels; level++) {
@@ -1126,10 +1122,11 @@ static void vlv_invert_wms(struct intel_crtc *crtc)
}
}
-static void vlv_compute_wm(struct intel_crtc *crtc)
+static void vlv_compute_wm(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
+ struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
const struct vlv_fifo_state *fifo_state = &crtc->wm.fifo_state;
struct intel_plane *plane;
int level;
@@ -1141,7 +1138,7 @@ static void vlv_compute_wm(struct intel_crtc *crtc)
wm_state->num_active_planes = 0;
- vlv_compute_fifo(crtc);
+ vlv_compute_fifo(crtc_state);
if (wm_state->num_active_planes != 1)
wm_state->cxsr = false;
@@ -1156,7 +1153,7 @@ static void vlv_compute_wm(struct intel_crtc *crtc)
/* normal watermarks */
for (level = 0; level < wm_state->num_levels; level++) {
- int wm = vlv_compute_wm_level(crtc->config, state,
level);
+ int wm = vlv_compute_wm_level(crtc_state, state, level);
int max_wm = fifo_state->plane[plane->id];
/* hack */
@@ -1193,7 +1190,7 @@ static void vlv_compute_wm(struct intel_crtc *crtc)
memset(&wm_state->sr[level], 0, sizeof(wm_state->sr[level]));
}
- vlv_invert_wms(crtc);
+ vlv_invert_wms(crtc_state);
}
#define VLV_FIFO(plane, value) \
@@ -1341,11 +1338,14 @@ static bool is_enabling(int old, int new, int threshold)
static void vlv_update_wm(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_crtc_state *crtc_state =
+ to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
struct vlv_wm_values *old_wm = &dev_priv->wm.vlv;
struct vlv_wm_values new_wm = {};
- vlv_compute_wm(crtc);
+ vlv_compute_wm(crtc_state);
+ crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
vlv_merge_wm(dev_priv, &new_wm);
if (memcmp(old_wm, &new_wm, sizeof(new_wm)) == 0) {
--
2.10.2
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