On Fri, Jun 15, 2012 at 11:55:19AM -0700, Jesse Barnes wrote:
> The PTE format is similar to SNB, but we don't support an MLC and don't
> need chipset flushing.
> 
> Signed-off-by: Jesse Barnes <[email protected]>

I have my questions whether this is right, given that MLC died for snb &
ivb, that ivb has grown a L3$ cache instead (which vlv seems to have, too)
and that the LLC bit here isn't actually LLC, but just means 'snoop cpu
caches'.

But I plan to burn this all with the heat of a thousands suns in my gtt
rework, so who cares ;-)
-Daniel

> ---
>  drivers/char/agp/intel-gtt.c |   11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 1237e75..c1e2943 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -1182,9 +1182,17 @@ static void gen6_write_entry(dma_addr_t addr, unsigned 
> int entry,
>  static void valleyview_write_entry(dma_addr_t addr, unsigned int entry,
>                                  unsigned int flags)
>  {
> +     unsigned int type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
> +     unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
>       u32 pte_flags;
>  
> -     pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
> +     if (type_mask == AGP_USER_MEMORY)
> +             pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
> +     else {
> +             pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;
> +             if (gfdt)
> +                     pte_flags |= GEN6_PTE_GFDT;
> +     }
>  
>       /* gen6 has bit11-4 for physical addr bit39-32 */
>       addr |= (addr >> 28) & 0xff0;
> @@ -1379,7 +1387,6 @@ static const struct intel_gtt_driver 
> valleyview_gtt_driver = {
>       .write_entry = valleyview_write_entry,
>       .dma_mask_size = 40,
>       .check_flags = gen6_check_flags,
> -     .chipset_flush = i9xx_chipset_flush,
>  };
>  
>  /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Mail: [email protected]
Mobile: +41 (0)79 365 57 48
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