On Mon, Mar 27, 2017 at 09:55:43PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Bspec tells us that gen3 platforms need 4KiB alignment for CURBASE
> rather than the 256 byte alignment required by i85x. Let's fix that
> and pull the code to determine the correct alignment to a helper
> function.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 53ec9d30437e..3a1d7d6530ec 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2084,6 +2084,16 @@ intel_fill_fb_ggtt_view(struct i915_ggtt_view *view,
> }
> }
>
> +static unsigned int intel_cursor_alignment(const struct drm_i915_private
> *dev_priv)
> +{
> + if (IS_I830(dev_priv))
> + return 16 * 1024;
> + else if (IS_I85X(dev_priv))
> + return 256;
> + else
> + return 4 * 1024;
> +}
> +
> static unsigned int intel_linear_alignment(const struct drm_i915_private
> *dev_priv)
> {
> if (INTEL_INFO(dev_priv)->gen >= 9)
> @@ -13329,7 +13339,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
> if (obj) {
> if (plane->type == DRM_PLANE_TYPE_CURSOR &&
> INTEL_INFO(dev_priv)->cursor_needs_physical) {
> - const int align = IS_I830(dev_priv) ? 16 * 1024 : 256;
> + const int align = intel_cursor_alignment(dev_priv);
>
> ret = i915_gem_object_attach_phys(obj, align);
> if (ret) {
> @@ -13641,7 +13651,7 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> goto out_free;
>
> if (INTEL_INFO(dev_priv)->cursor_needs_physical) {
> - int align = IS_I830(dev_priv) ? 16 * 1024 : 256;
> + int align = intel_cursor_alignment(dev_priv);
>
> ret = i915_gem_object_attach_phys(intel_fb_obj(fb), align);
> if (ret) {
> --
> 2.10.2
>
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