We improved the reset reliablity on gen4 with
stopping all engines before commencing reset, in
commit 2c80353f3cd0 ("drm/i915/g4x: Improve gpu reset reliability")Evidence indicates that this same trick works with gen3. Testcase: igt/gem_busy/*-hang #blb-e6850 Cc: Ville Syrjälä <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Tomi Sarvela <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> --- drivers/gpu/drm/i915/intel_uncore.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index df425bf629e3..b9bd5e61d6d0 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1488,6 +1488,9 @@ static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) { struct pci_dev *pdev = dev_priv->drm.pdev; + /* Stop engines. See g4x_do_reset() below why. */ + gen3_stop_rings(dev_priv); + pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE); return wait_for(g4x_reset_complete(pdev), 500); } -- 2.11.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
