On 4/7/2017 12:45 AM, Rodrigo Vivi wrote:
There is no confirmation if the DC5 to DC6 is available on CNL
though. But I could see DC3 to DC5 counter increasing reliably.
So let's at least add this one.
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index d07257b..2ae79a6 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2859,7 +2859,10 @@ static int i915_dmc_info(struct seq_file *m, void
*unused)
seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
CSR_VERSION_MINOR(csr->version));
- if (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6)) {
+ if (IS_CANNONLAKE(dev_priv)) {
+ seq_printf(m, "DC3 -> DC5 count: %d\n",
+ I915_READ(SKL_CSR_DC3_DC5_COUNT));
Have not found any info regarding DC5/DC6-counter in bspec for CNL.
I assume H/W team stop exposing these counter as I can not see DC5/DC6 counter
details for other platform other than gen9(skl/bxt).
Not sure is it ok to rely on something which is not confirmed.
Regards,
Animesh
+ } else if (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6)) {
seq_printf(m, "DC3 -> DC5 count: %d\n",
I915_READ(SKL_CSR_DC3_DC5_COUNT));
seq_printf(m, "DC5 -> DC6 count: %d\n",
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