Currently, BXT_PP is hardcoded with value '0'.
It practically disabled eDP backlight on MRB (BXT) platform.

This patch will tell which BXT_PP registers (there are two set of PP_CONTROL in 
the spec)
to be used as defined in VBT (Video Bios Timing table) and this will enabled eDP
backlight controller on MRB (BXT) platform.

Change-Id: I42242d8def30d09298b629e3cd4828016189c3fa
Signed-off-by: Mustamin B Mustaffa <[email protected]>
Tracked-On: https://jira01.devtools.intel.com/browse/OAM-46254
---
 drivers/gpu/drm/i915/intel_dp.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d1670b8..124f58b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -591,13 +591,8 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
        /* We should never land here with regular DP ports */
        WARN_ON(!is_edp(intel_dp));
 
-       /*
-        * TODO: BXT has 2 PPS instances. The correct port->PPS instance
-        * mapping needs to be retrieved from VBT, for now just hard-code to
-        * use instance #0 always.
-        */
        if (!intel_dp->pps_reset)
-               return 0;
+               return dev_priv->vbt.backlight.controller;
 
        intel_dp->pps_reset = false;
 
-- 
1.9.1

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