On Wed, 18 Jul 2012 10:14:46 -0700 Eric Anholt <[email protected]> wrote:
> Ben Widawsky <[email protected]> writes: > > > The interface's immediate purpose is to do synchronous timestamp queries > > as required by GL_TIMESTAMP. The GPU has a register for reading the > > timestamp but because that would normally require root access through > > libpciaccess, the IOCTL can provide this service instead. > > > > Currently the implementation whitelists only the render ring timestamp > > register, because that is the only thing we need to expose at this time. > > > > v2: make size implicit based on the register offset > > Add a generation check > > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > > index 8cc7083..fbe7757 100644 > > --- a/include/drm/i915_drm.h > > +++ b/include/drm/i915_drm.h > > @@ -203,6 +203,7 @@ typedef struct _drm_i915_sarea { > > #define DRM_I915_GEM_WAIT 0x2c > > #define DRM_I915_GEM_CONTEXT_CREATE 0x2d > > #define DRM_I915_GEM_CONTEXT_DESTROY 0x2e > > +#define DRM_I915_REG_READ 0x30 > > Is 0x2f some other outstanding ioctl? > I was saving it for some yet to be realized context ioctl. We can use 0x2f, I don't care. Daniel - feel free to change it or not as you please when/if you suck it in. > Other than that, > > Reviewed-by: Eric Anholt <[email protected]> > > Note: we have requests both by Arjan and by Valve for the functionality > that this patch will allow. -- Ben Widawsky, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
