On Wed, Jul 12, 2017 at 05:08:50PM +0300, Jani Nikula wrote: > Signed-off-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/intel_crt.c | 44 > ++++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_display.c | 16 +------------ > 2 files changed, 45 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_crt.c > b/drivers/gpu/drm/i915/intel_crt.c > index 84a1f5e85153..82bd149889ee 100644 > --- a/drivers/gpu/drm/i915/intel_crt.c > +++ b/drivers/gpu/drm/i915/intel_crt.c > @@ -227,11 +227,53 @@ static void hsw_post_disable_crt(struct intel_encoder > *encoder, > intel_ddi_fdi_post_disable(encoder, old_crtc_state, old_conn_state); > } > > +static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state) > +{ > + struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_i915_private *dev_priv = to_i915(crtc->dev); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + > + WARN_ON(!intel_crtc->config->has_pch_encoder); > + > + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, false); > +} > + > +static void hsw_pre_enable_crt(struct intel_encoder *encoder, > + struct intel_crtc_state *pipe_config, > + struct drm_connector_state *conn_state) > +{ > + struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_i915_private *dev_priv = to_i915(crtc->dev); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + int pipe = intel_crtc->pipe; > + > + WARN_ON(!intel_crtc->config->has_pch_encoder); > + > + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); > +} > + > static void intel_enable_crt(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > + struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_i915_private *dev_priv = to_i915(crtc->dev); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + int pipe = intel_crtc->pipe; > + > intel_crt_set_dpms(encoder, pipe_config, DRM_MODE_DPMS_ON); > + > + if (HAS_DDI(dev_priv)) { > + WARN_ON(!intel_crtc->config->has_pch_encoder); > + > + intel_wait_for_vblank(dev_priv, pipe); > + intel_wait_for_vblank(dev_priv, pipe); > + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); > + intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, > + true); > + } > }
Bikeshed, but since we have so many hsw_ special cases already, I'd do one for enable too. Mixing up vfuncs and if conditions are confusing. With that (and a bit more commit message perhaps): Reviewed-by: Daniel Vetter <[email protected]> > > static enum drm_mode_status > @@ -907,6 +949,8 @@ void intel_crt_init(struct drm_i915_private *dev_priv) > crt->base.port = PORT_E; > crt->base.get_config = hsw_crt_get_config; > crt->base.get_hw_state = intel_ddi_get_hw_state; > + crt->base.pre_pll_enable = hsw_pre_pll_enable_crt; > + crt->base.pre_enable = hsw_pre_enable_crt; > crt->base.post_disable = hsw_post_disable_crt; > } else { > crt->base.port = PORT_NONE; > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 2144adc5b1d5..02448a86edeb 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5346,10 +5346,6 @@ static void haswell_crtc_enable(struct > intel_crtc_state *pipe_config, > if (WARN_ON(intel_crtc->active)) > return; > > - if (intel_crtc->config->has_pch_encoder) > - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, > - false); > - > intel_encoders_pre_pll_enable(crtc, pipe_config, old_state); > > if (intel_crtc->config->shared_dpll) > @@ -5383,9 +5379,7 @@ static void haswell_crtc_enable(struct intel_crtc_state > *pipe_config, > > intel_crtc->active = true; > > - if (intel_crtc->config->has_pch_encoder) > - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); > - else > + if (!intel_crtc->config->has_pch_encoder) > intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); > > intel_encoders_pre_enable(crtc, pipe_config, old_state); > @@ -5429,14 +5423,6 @@ static void haswell_crtc_enable(struct > intel_crtc_state *pipe_config, > > intel_encoders_enable(crtc, pipe_config, old_state); > > - if (intel_crtc->config->has_pch_encoder) { > - intel_wait_for_vblank(dev_priv, pipe); > - intel_wait_for_vblank(dev_priv, pipe); > - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); > - intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, > - true); > - } > - > /* If we change the relative order between pipe/planes enabling, we need > * to change the workaround. */ > hsw_workaround_pipe = pipe_config->hsw_workaround_pipe; > -- > 2.11.0 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
