Hi Maarten, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.13-rc1 next-20170721] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Maarten-Lankhorst/drm-i915-Calculate-vlv-chv-intermediate-watermarks-correctly-v3/20170723-044645 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-x010-201730 (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/gpu/drm/i915/intel_pm.c: In function 'vlv_compute_intermediate_wm': drivers/gpu/drm/i915/intel_pm.c:2012:3: error: implicit declaration of function 'intel_atomic_get_old_crtc_state' [-Werror=implicit-function-declaration] intel_atomic_get_old_crtc_state(new_crtc_state->base.state, crtc); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/gpu/drm/i915/intel_pm.c:2012:3: error: initialization makes pointer >> from integer without a cast [-Werror=int-conversion] cc1: all warnings being treated as errors vim +2012 drivers/gpu/drm/i915/intel_pm.c 2004 2005 static int vlv_compute_intermediate_wm(struct drm_device *dev, 2006 struct intel_crtc *crtc, 2007 struct intel_crtc_state *new_crtc_state) 2008 { 2009 struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; 2010 const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; 2011 const struct intel_crtc_state *old_crtc_state = > 2012 > intel_atomic_get_old_crtc_state(new_crtc_state->base.state, crtc); 2013 const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal; 2014 int level; 2015 2016 if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { 2017 *intermediate = *optimal; 2018 2019 intermediate->cxsr = false; 2020 goto out; 2021 } 2022 2023 intermediate->num_levels = min(optimal->num_levels, active->num_levels); 2024 intermediate->cxsr = optimal->cxsr && active->cxsr && 2025 !new_crtc_state->disable_cxsr; 2026 2027 for (level = 0; level < intermediate->num_levels; level++) { 2028 enum plane_id plane_id; 2029 2030 for_each_plane_id_on_crtc(crtc, plane_id) { 2031 intermediate->wm[level].plane[plane_id] = 2032 min(optimal->wm[level].plane[plane_id], 2033 active->wm[level].plane[plane_id]); 2034 } 2035 2036 intermediate->sr[level].plane = min(optimal->sr[level].plane, 2037 active->sr[level].plane); 2038 intermediate->sr[level].cursor = min(optimal->sr[level].cursor, 2039 active->sr[level].cursor); 2040 } 2041 2042 vlv_invalidate_wms(crtc, intermediate, level); 2043 2044 out: 2045 /* 2046 * If our intermediate WM are identical to the final WM, then we can 2047 * omit the post-vblank programming; only update if it's different. 2048 */ 2049 if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0) 2050 new_crtc_state->wm.need_postvbl_update = true; 2051 2052 return 0; 2053 } 2054 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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