On Wed, Aug 16, 2017 at 11:51 PM Manasi Navare <[email protected]> wrote:
> In case of eDP because the panel has a fixed mode we cannot > link train fallback and prune modes since this results in > no modes available for eDP connector. What about downclock modes?! > > Also since its a panel, link training should not fail dynamically > based on cable conditions like in case of DP. Is there any bug associated with this patch? > > Cc: Jani Nikula <[email protected]> > Cc: Jim Bride <[email protected]> > Cc: Ville Syrjälä <[email protected]> > Cc: Daniel Vetter <[email protected]> > Signed-off-by: Manasi Navare <[email protected]> > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > drivers/gpu/drm/i915/intel_dp_link_training.c | 3 ++- > drivers/gpu/drm/i915/intel_drv.h | 1 + > 3 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > b/drivers/gpu/drm/i915/intel_dp.c > index 4fd4853..edac0c8 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -109,7 +109,7 @@ static const int default_rates[] = { 162000, 270000, > 540000 }; > * If a CPU or PCH DP output is attached to an eDP panel, this function > * will return true, and false otherwise. > */ > -static bool is_edp(struct intel_dp *intel_dp) > +bool is_edp(struct intel_dp *intel_dp) > { > struct intel_digital_port *intel_dig_port = > dp_to_dig_port(intel_dp); > > diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c > b/drivers/gpu/drm/i915/intel_dp_link_training.c > index 05907fa..18ec61f 100644 > --- a/drivers/gpu/drm/i915/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c > @@ -332,7 +332,8 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) > intel_connector->base.base.id, > intel_connector->base.name, > intel_dp->link_rate, intel_dp->lane_count); > - if (!intel_dp_get_link_train_fallback_values(intel_dp, > + /* Dont fallback and prune modes if its eDP */ > + if (!is_edp(intel_dp) && > !intel_dp_get_link_train_fallback_values(intel_dp, > intel_dp->link_rate, > intel_dp->lane_count)) > /* Schedule a Hotplug Uevent to userspace to start modeset > */ > diff --git a/drivers/gpu/drm/i915/intel_drv.h > b/drivers/gpu/drm/i915/intel_drv.h > index fa47285..9800a15 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1548,6 +1548,7 @@ static inline unsigned int > intel_dp_unused_lane_mask(int lane_count) > } > > bool intel_dp_read_dpcd(struct intel_dp *intel_dp); > +bool is_edp(struct intel_dp *intel_dp); > int intel_dp_link_required(int pixel_clock, int bpp); > int intel_dp_max_data_rate(int max_link_clock, int max_lanes); > bool intel_digital_port_connected(struct drm_i915_private *dev_priv, > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >
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